1. Field of the Invention
The present invention relates to the generation of a clock signal used to reproduce data from an optical disc, and more particularly, to a frequency detection apparatus and method for generating a stable clock signal synchronized with an input signal and a signal boost filter used in the frequency detection apparatus and method.
2. Description of the Related Art
A binary signal value is recorded on the surface of an optical disc, such as a compact disc (CD) or a digital versatile disc (DVD) and can be reproduced by reading an optical signal corresponding to light. The light may be a laser incident upon the optical disc and reflected thereby. Although the binary signal value is recorded on the optical disc, the optical signal read by the optical disc is a radio frequency (RF) signal because of the characteristics of the optical disc. Hence, a process for converting the read-out optical signal into a digital signal is required.
To restore data stored in the optical disc, an analog-to-digital converter (ADC) and a phase locked loop (PLL) circuit are required. The PLL circuit outputs a system clock signal used to restore digital data in synchronization with an input signal.
FIG. 1 is a block diagram of a general PLL circuit, which includes a phase detector (PD) 110, a loop filter 120, and a voltage controlled oscillator (VCO) 130.
The PD 110 detects a phase difference between an input signal and a clock signal output by the VCO 130. The detected phase difference is applied to the loop filter 120. The loop filter 120 accumulates the components of detected phase differences, converts the accumulated component into a control voltage signal, and applies the control voltage signal to the VCO 130. The VCO 130 produces a clock signal in response to the control voltage signal received from the loop filter 120.
FIG. 2 is a block diagram of a general PLL circuit formed by adding a frequency detector (FD) 140 to the PLL circuit of FIG. 1.
In general, the range of frequency signals that a PLL circuit can synchronize is limited due to the characteristics of the loop filter 120. In practice, the range of frequency signals that a PLL circuit can synchronize is significantly narrow. When there is a big difference between the frequency of the input signal and the frequency of the clock signal output by the VCO 130, the PLL circuit does not operate. Thus, synchronizing the input signal with the clock signal is impossible. To solve this problem, the frequency of the clock signal output by the VCO 130 is made similar to the frequency of the input signal using the FD 140 so that the PLL circuit can operate.
The FD 140 may have various structures. The input signal includes a data signal and a sync signal. The FD 140 is generally designed to detect the frequency of an input signal using a component signal having the longest period among component signals included in a sync signal. In optical discs, such as a DVD, the longest period of a data signal is a 14T (where T is a basic period) period included in a sync signal. When a PLL circuit normally operates, a signal with a 14T period is detected. However, when the frequency of a clock signal of the VCO 130 increases or decreases, a signal having a period longer or shorter than the 14T period is detected. Hence, the FD 140 detects a maximum period in a predetermined frequency range of the input signal and ascertains the difference between the frequencies of the input signal and clock signal using the difference between the detected period and the 14T period.
FIGS. 3A and 3B illustrate a case where an error in an input signal exceeds a binary level. If the magnitude of the input signal is greater than a binary level of 0, it is detected as 1. If the magnitude of the input signal is smaller than the binary level of 0, it is detected as 0. With a recent increase in the recording density of an optical disc, the quality of a signal reproduced degrades. Due to the degradation of the quality of the reproduced signal, the error in the input signal may exceed a binary level as illustrated in FIGS. 3A and 3B. In this case, the input signal is not accurately detected, and thus the longest period of the input signal may be wrongly detected. In other words, as illustrated in FIG. 3A, a portion 310 of an original signal is detected as 1, but as illustrated in FIG. 3B, a portion 320 of a distorted signal corresponding to the portion 310 is detected as 0. Hence, the maximum period may be wrongly detected, which requires a signal boost filter which boosts a high frequency component of an input signal around a binary level.